Estudio espectroelectroquímico de componentes de sales orgánicas conductoras. Electrocristalización y espectroelectroquímica

II Encuentro sobre nanociencia y nanotecnología de investigadores y tecnólogos de la Universidad de Córdoba. NANOUC

Test Infrastructure for Address-Event-Representation Communications

Address-Event-Representation (AER) is a communication protocol for transferring spikes between bio-inspired chips. Such systems may consist of a hierarchical structure with several chips that transmit spikes among them in real time, while performing some processing. To develop and test AER based systems it is convenient to have a set of instruments that would allow to: generate AER streams, monitor the output produced by neural chips and modify the spike stream produced by an emitting chip to adapt it to the requirements of the receiving elements. In this paper we present a set of tools that implement these functions developed in the CAVIAR EU project.Unión Europea IST-2001-34124 (CAVIAR)Ministerio de Ciencia y Tecnología TIC-2003-08164-C03-0

Archivo de reconciliación de gastos empresa de manufactura y cliente

Se documenta la metodología, objetivos, proceso de aplicación y análisis de resultados de una intervención organizacional para mejorar el proceso de reconciliación de cada cuarto fiscal, que incluye gastos efectuados o impactos debido a cambios solicitados por el cliente, entre una empresa de iluminación con el corporativo base en Carolina del Norte, Estados Unidos, y la empresa manufacturera localizada en Guadalajara, Jalisco, México

Neuroanatomical characterization of the G protein-coupled receptor activity evoked by galanin-related ligands

Galanin neuropeptide is distributed throughout the mammalian nervous system modulating a plethora of diverse physiological functions, including nociception, cognition and neuroendocrine regulation. The regulation of the galaninergic system is an interesting approach for the treatment of different diseases associated to those systems. Nevertheless, the pharmacological selectivity and activities of some galanin receptor (GalR) ligands are still in discussion and seem to depend on the dose, the receptor subtype and the second messengers to which they are coupled at different brain areas. The activity of different GalR ligands on Gi/o proteins, was evaluated by the guanosine 5′-(γ-[35S]thio)triphosphate ([35S]GTPγS) autoradiography in vitro assay applied to rat brain tissue slices in the presence of galanin, M15, M35, M40, gal(2−11) or galnon. The enhancement of the [35S]GTPγS binding induced by the chimerical peptides M15, M35 and M40 was similar to that produced by Gal in those brain areas showing the highest stimulations, such as dorsal part of the olfactory nucleus and ventral subiculum. In contrast to these peptides, using gal(2−11) no effect was measured on Gi/o protein coupling in areas of the rat brain with high GalR1 density such as posterior hypothalamic nucleus and amygdala, indicating low selectivity for GalR1 receptors. The effects evoked by the non-peptide ligand, galnon, were different from those induced by galanin, behaving as agonist or antagonist depending on the brain area, but the stimulations were always blocked by M35. Thus, the activity of most used GalR ligands on Gi/o protein mediated signalling is complex and depends on the brain area. More selective and potent GalR ligands are necessary to develop new treatments aimed to modulate the galaninergic system.Supported by grants from the regional Basque Government IT1454–22 awarded to the "Neurochemistry and Neurodegeneration" consolidated research group and ISCIII Spanish Ministry for Health PI20/00153 and co-funded by the European Union (ERDF "A way to make Europe"). Technical and human support provided by General Research Services SGIker [University of the Basque Country (UPV/EHU)]

Evaluation of p53, Caspase-3, Bcl-2, and Ki-67 markers in oral squamous cell carcinoma and premalignant epithelium in a sample from Alava Province (Spain)

Objectives: The objective of this study was to determine whether alterations in the expression of p53, caspase-3 Bcl-2, and ki-67 appear early in premalignant oral epithelium and show clonal behavior. Study Design: Samples from 41 tumors with their adjacent non-tumor epithelia were immunohistochemically analyzed using monoclonal antibodies that recognize p53, caspase-3, Bcl-2, and Ki-67 Results: A statistically significant association was found between the expression in tumor and adjacent epithelium of p53, caspase-3, and Bcl-2 but not of k-67. A significant association was observed between the expression of ki-67 and p53 in both localizations. In non-tumor (premalignant) epithelium samples, there was a significant inverse relationship between the expressions of p53 and caspase-3 and a significant direct relationship between the expressions of p53 and Bcl-2. Conclusions: Alterations in these proteins appear to operate in combination with premalignant epithelia to create hyperproliferative cell states that favor the acquisition of summative oncogenic errors that confer invasive capacity

LVDS Serial AER Link performance

Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems may consist of a complicated hierarchical structure with many chips that transmit data among them in real time, while performing some processing (for example, convolutions). The event information is transferred using a high speed digital parallel bus (typically 16 bits and 20ns-40ns per event). This paper presents a testing platform for AER systems that allows analysing a LVDS Serial AER link produced by a Spartan 3 FPGA, or by a commercial LVDS transceiver. The interface allows up to 0.728 Gbps (~40Mev/s, 16 bits/ev). The eye diagram ensures that the platform could support 1.2 Gbps.Commission of the European Communities IST-2001-34124 (CAVIAR)Comisión Interministerial de Ciencia y Tecnología TIC-2003-08164-C03-0

Two Hardware Implementations of the Exhaustive Synthetic AER Generation Method

Address-Event-Representation (AER) is a communications protocol for transferring images between chips, originally developed for bio-inspired image processing systems. In [6], [5] various software methods for synthetic AER generation were presented. But in neuro-inspired research field, hardware methods are needed to generate AER from laptop computers. In this paper two real time implementations of the exhaustive method, proposed in [6], [5], are presented. These implementations can transmit, through AER bus, images stored in a computer using USB-AER board developed by our RTCAR group for the CAVIAR EU project.Commission of the European Communities IST-2001-34124 (CAVIAR)Comisión Interministerial de Ciencia y Tecnología TIC-2003-08164-C03-0

Learning algorithm evaluation on advanced driver assistance

Trabajo de Fin de Grado de Doble Grado en Ingeniería Informática y Matemáticas, Facultad de Informática UCM, Departamento de Arquitectura de Computadores y Automática, Curso 2019/2020El principal objetivo de este proyecto de investigación y desarrollo es el análisis e implementación de arquitecturas deep learning para la detección en tiempo real de peatones, ciclistas y vehículos en el ámbito de la conducción autónoma. El vertiginoso crecimiento de la capacidad de procesamiento ha provocado el surgimiento de nuevas ramas de investigación tecnológica, entre ellas la de la Inteligencia Artificial (IA). En particular, dentro de la IA podemos destacar la aparición de las redes neuronales profundas como técnica para abordar problemas relacionados con la percepción visual, como puede ser la clasificación de objetos o la detección de objetos. Uno de los campos donde la IA que está teniendo una mayor influencia es la creación de sistemas avanzados de asistencia para la conducción (ADAS). Estos sistemas de conducción se apoyan en una amplia variedad de cámaras y sensores que proporcionan toda la información necesaria para tomar decisiones con precisión y seguridad. Un sistema ADAS está compuesto por distintos módulos. Uno de ellos se encarga de la detección en tiempo real de objetos. En este proyecto nos centramos en la detección en tiempo real de vehículos, ciclistas y peatones, aunque podrían incluirse líneas de carretera y señales de tráfico, entre otros objetos. Para conseguir dicho objetivo dividiremos en dos partes diferenciadas el trabajo: -Reentrenamiento de una red generalista para aprender a identificar vehículos, peatones y ciclistas. -Estudio del rendimiento de la inferencia realizada por la red reentrenada en términos de precisión, velocidad de inferencia y consumo sobre un conjunto de dispositivos hardware.The main aim of this research and development project is the analysis and implementation of deep learning’s architectures for real-time object detection of pedestrians, cyclists and cars on the scope of autonomous driving. The breakneck growth of the computing capacity has caused the emergence of new technological research fields such as Artificial Intelligence (AI). Especifically, we can highlight the uncovering of deep neural networks as a technique to approach challenges related to visual perception, for example object classification or object detection. One of the areas where the artificial intelligence is having a great influence is on the creation of advanced driver-assistance systems (ADAS). These systems take advantage of cutting-edge cameras and sensors that feed the systems with all the necessary information to take decisions with accuracy and security. An advanced driver-assistance system is made of several modules. One of them perform object detection in real-time. The main focus of this project is real-time detection of pedestrians, cyclists and cars. To achieve this objective, we will divide the work into two parts: -Fine-tuning of a generalist network to learn how to identify pedestrians, cyclists and cars. -Perfomance analysis in terms of efficiency, speed and power consumption during the inference performed by the fine-tuned network over a set of hardware devices.Depto. de Arquitectura de Computadores y AutomáticaFac. de InformáticaTRUEunpu